13. “A 60-ns 16Mb Flash EEPROM with Program and Erase Sequence Controller” November 1991 number 11 vol.26;TAKESHI NAKAYAMA,SHIN-ICHI KOBAYASHI,YOSHIKAZU MIYAWAKI,YASUSHI TERADA,NATSUO AJIKA,MAKOTO OHI,HIDEAKI ARIMA,TAKAYUKI MATSUKAWA,TSUTOMU YOSHIHARA,KIMIO SUZUKI.
14. “A Dual-Mode Sensing Scheme of Capacitor-coupled EEPROM Cell” April 1992 number 4 vol.27; MASANORI HAYASUIKOSHI ,HIDETO HIDAKA,KAZUTAMI ARIMOTO, KAZUYASU FUJISHIMA.
15. “A 512-kb Flash EEPROM Embedded in a 32-b Microcontroller” April 1992 number 4 vol.24; CLINTON KUO,MARK WEIDNER,THOMAS TOMS,HENRY CHOE,KO-MIN CHANG,ANN HARWOOD,JOSEPH JELEMENSKY,PHILIP SMITH.
16. “A 5-v-Only Operation0.6 mm Flash EEPROM with Row Decoder Scheme in Triple-Well Structure” November 1998 number 11 vol.27; AKIRA UMEZAWA ,SHIGERU ATSUMI,MASAO KURIYAMA,HIRONORI BANDA,KEN-ICHI IMAMIYA,KIYOMI NARUKE,SEIJI YAMADA,ETSUSHI OBI,MASAMITSU OSHIKIRI,TOMOKO SUZUKI,SUMIO TANAKA.
17. “High-Voltage Regulation and Process Consideration for High-Density 5V-Only EEPROM’S ”October 1983 number 5 vol. sc-18; DUANE H . OTO,VINOD K. DHAM, KEITH H. GUDGER,MICHAEL J. REITSMA, GEOFFREY S. GONGWER,YAW WEN HU,JAY F. OLUND,H.STANLEY JONES,SIDNEY T. K. NIEH.
18. “A 16 kbit Smart 5V-Only EEPROM with Redundancy”. October 1983 number 5 vol.sc-18;ELROY M. LUCERO,NAGESH CHALLA ,JULIAN FIELDS,JR.
19. “A 35-ns 64K EEPROM” October 1985 number 5 vol.sc-20;CAMPBELL,DAVID L. TENNANT ,JAY F.OLUND,ROBERT B. LEFFERTS,BRENDAN T. CREMEN,PHILIP A. ANDREWS.
20. “A Temperature-and Process Tolerant 64K EEPROM .”October 1985 number 5 vol.sc-20;COLIN S.BILL,PAUL I. SUCIU, MICHAEL S. BRINER, DARRELL D. RINERSON.
21. “An Experimental 5-V-Only 256-kbit CMOS EEPROM with a High-Performance Single-Polysilicon Cell”. October 1986 number 5 vol.sc-21; JUN-ICHI MIYAMOTO, JUN-ICHI TSUJI-MOTO,NAOHIRO MATSUKAWA,SHIGERU MORITA,KAZUYOSI SHINADA,HIROSHI NOZAWA,TETSUA IIZUKA.
22. “A Four-state EEPROM using Floating-Gate Memory Cells ”June 1987 number 3 vol.sc-22; CHRISTOPH BLEIKER, HANS MELCHIOR.77